1/*****************************************************************************\ 2 * coreboot_tables.h 3\*****************************************************************************/ 4 5#ifndef COREBOOT_TABLES_H 6#define COREBOOT_TABLES_H 7 8#include <stdint.h> 9 10/* Note: The contents of this file were borrowed from the coreboot source 11 * code which may be obtained from http://www.coreboot.org/. 12 * Specifically, this code was obtained from LinuxBIOS version 1.1.8. 13 */ 14 15/* The coreboot table information is for conveying information 16 * from the firmware to the loaded OS image. Primarily this 17 * is expected to be information that cannot be discovered by 18 * other means, such as quering the hardware directly. 19 * 20 * All of the information should be Position Independent Data. 21 * That is it should be safe to relocated any of the information 22 * without it's meaning/correctnes changing. For table that 23 * can reasonably be used on multiple architectures the data 24 * size should be fixed. This should ease the transition between 25 * 32 bit and 64 bit architectures etc. 26 * 27 * The completeness test for the information in this table is: 28 * - Can all of the hardware be detected? 29 * - Are the per motherboard constants available? 30 * - Is there enough to allow a kernel to run that was written before 31 * a particular motherboard is constructed? (Assuming the kernel 32 * has drivers for all of the hardware but it does not have 33 * assumptions on how the hardware is connected together). 34 * 35 * With this test it should be straight forward to determine if a 36 * table entry is required or not. This should remove much of the 37 * long term compatibility burden as table entries which are 38 * irrelevant or have been replaced by better alternatives may be 39 * dropped. Of course it is polite and expidite to include extra 40 * table entries and be backwards compatible, but it is not required. 41 */ 42 43/* Since coreboot is usually compiled 32bit, gcc will align 64bit 44 * types to 32bit boundaries. If the coreboot table is dumped on a 45 * 64bit system, a uint64_t would be aligned to 64bit boundaries, 46 * breaking the table format. 47 * 48 * lb_uint64 will keep 64bit coreboot table values aligned to 32bit 49 * to ensure compatibility. They can be accessed with the two functions 50 * below: unpack_lb64() and pack_lb64() 51 * 52 * See also: util/lbtdump/lbtdump.c 53 */ 54 55struct lb_uint64 { 56 uint32_t lo; 57 uint32_t hi; 58}; 59 60static inline uint64_t unpack_lb64(struct lb_uint64 value) 61{ 62 uint64_t result; 63 result = value.hi; 64 result = (result << 32) + value.lo; 65 return result; 66} 67 68static inline struct lb_uint64 pack_lb64(uint64_t value) 69{ 70 struct lb_uint64 result; 71 result.lo = (value >> 0) & 0xffffffff; 72 result.hi = (value >> 32) & 0xffffffff; 73 return result; 74} 75 76struct lb_header { 77 union { 78 uint8_t signature[4]; /* LBIO */ 79 uint32_t signature32; 80 }; 81 uint32_t header_bytes; 82 uint32_t header_checksum; 83 uint32_t table_bytes; 84 uint32_t table_checksum; 85 uint32_t table_entries; 86}; 87 88/* Every entry in the boot enviroment list will correspond to a boot 89 * info record. Encoding both type and size. The type is obviously 90 * so you can tell what it is. The size allows you to skip that 91 * boot enviroment record if you don't know what it easy. This allows 92 * forward compatibility with records not yet defined. 93 */ 94struct lb_record { 95 uint32_t tag; /* tag ID */ 96 uint32_t size; /* size of record (in bytes) */ 97}; 98 99#define LB_TAG_UNUSED 0x0000 100 101#define LB_TAG_MEMORY 0x0001 102 103struct lb_memory_range { 104 struct lb_uint64 start; 105 struct lb_uint64 size; 106 uint32_t type; 107#define LB_MEM_RAM 1 /* Memory anyone can use */ 108#define LB_MEM_RESERVED 2 /* Don't use this memory region */ 109#define LB_MEM_TABLE 16 /* Ram configuration tables are kept in */ 110}; 111 112struct lb_memory { 113 uint32_t tag; 114 uint32_t size; 115 struct lb_memory_range map[0]; 116}; 117 118#define LB_TAG_HWRPB 0x0002 119struct lb_hwrpb { 120 uint32_t tag; 121 uint32_t size; 122 uint64_t hwrpb; 123}; 124 125#define LB_TAG_MAINBOARD 0x0003 126struct lb_mainboard { 127 uint32_t tag; 128 uint32_t size; 129 uint8_t vendor_idx; 130 uint8_t part_number_idx; 131 uint8_t strings[0]; 132}; 133 134#define LB_TAG_VERSION 0x0004 135#define LB_TAG_EXTRA_VERSION 0x0005 136#define LB_TAG_BUILD 0x0006 137#define LB_TAG_COMPILE_TIME 0x0007 138#define LB_TAG_COMPILE_BY 0x0008 139#define LB_TAG_COMPILE_HOST 0x0009 140#define LB_TAG_COMPILE_DOMAIN 0x000a 141#define LB_TAG_COMPILER 0x000b 142#define LB_TAG_LINKER 0x000c 143#define LB_TAG_ASSEMBLER 0x000d 144struct lb_string { 145 uint32_t tag; 146 uint32_t size; 147 uint8_t string[0]; 148}; 149#define LB_TAG_SERIAL 0x000f 150#define LB_TAG_CONSOLE 0x0010 151#define LB_TAG_FORWARD 0x0011 152struct lb_forward { 153 uint32_t tag; 154 uint32_t size; 155 uint64_t forward; 156}; 157 158/* The following structures are for the cmos definitions table */ 159#define LB_TAG_CMOS_OPTION_TABLE 200 160/* cmos header record */ 161struct cmos_option_table { 162 uint32_t tag; /* CMOS definitions table type */ 163 uint32_t size; /* size of the entire table */ 164 uint32_t header_length; /* length of header */ 165}; 166 167/* cmos entry record 168 This record is variable length. The name field may be 169 shorter than CMOS_MAX_NAME_LENGTH. The entry may start 170 anywhere in the byte, but can not span bytes unless it 171 starts at the beginning of the byte and the length is 172 fills complete bytes. 173*/ 174#define LB_TAG_OPTION 201 175struct cmos_entries { 176 uint32_t tag; /* entry type */ 177 uint32_t size; /* length of this record */ 178 uint32_t bit; /* starting bit from start of image */ 179 uint32_t length; /* length of field in bits */ 180 uint32_t config; /* e=enumeration, h=hex, r=reserved */ 181 uint32_t config_id; /* a number linking to an enumeration record */ 182#define CMOS_MAX_NAME_LENGTH 32 183 uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name of entry in ascii, 184 variable length int aligned */ 185}; 186 187/* cmos enumerations record 188 This record is variable length. The text field may be 189 shorter than CMOS_MAX_TEXT_LENGTH. 190*/ 191#define LB_TAG_OPTION_ENUM 202 192struct cmos_enums { 193 uint32_t tag; /* enumeration type */ 194 uint32_t size; /* length of this record */ 195 uint32_t config_id; /* a number identifying the config id */ 196 uint32_t value; /* the value associated with the text */ 197#define CMOS_MAX_TEXT_LENGTH 32 198 uint8_t text[CMOS_MAX_TEXT_LENGTH]; /* enum description in ascii, 199 variable length int aligned */ 200}; 201 202/* cmos defaults record 203 This record contains default settings for the cmos ram. 204*/ 205#define LB_TAG_OPTION_DEFAULTS 203 206struct cmos_defaults { 207 uint32_t tag; /* default type */ 208 uint32_t size; /* length of this record */ 209 uint32_t name_length; /* length of the following name field */ 210 uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name identifying the default */ 211#define CMOS_IMAGE_BUFFER_SIZE 128 212 uint8_t default_set[CMOS_IMAGE_BUFFER_SIZE]; /* default settings */ 213}; 214 215#define LB_TAG_OPTION_CHECKSUM 204 216struct cmos_checksum { 217 uint32_t tag; 218 uint32_t size; 219 /* In practice everything is byte aligned, but things are measured 220 * in bits to be consistent. 221 */ 222 uint32_t range_start; /* First bit that is checksummed (byte aligned) */ 223 uint32_t range_end; /* Last bit that is checksummed (byte aligned) */ 224 uint32_t location; /* First bit of the checksum (byte aligned) */ 225 uint32_t type; /* Checksum algorithm that is used */ 226#define CHECKSUM_NONE 0 227#define CHECKSUM_PCBIOS 1 228}; 229 230#endif /* COREBOOT_TABLES_H */ 231