LXR coreboot/src/mainboard/supermicro/x6dhe

   1#include <device/pnp_def.h>
   2
   3#define NSC_WD_DEV PNP_DEV(0x2e, 0xa)
   4#define NSC_WDBASE 0x600
   5#define ESB6300_WDBASE 0x400
   6#define ESB6300_GPIOBASE 0x500
   7
   8static void disable_sio_watchdog(device_t dev)
   9{
  10#if 0
  11        /* FIXME move me somewhere more appropriate */
  12        pnp_set_logical_device(dev);
  13        pnp_set_enable(dev, 1);
  14        pnp_set_iobase(dev, PNP_IDX_IO0, NSC_WDBASE);
  15        /* disable the sio watchdog */
  16        outb(0, NSC_WDBASE + 0);
  17        pnp_set_enable(dev, 0);
  18#endif
  19}
  20
  21static void disable_esb6300_watchdog(void)
  22{
  23        /* FIXME move me somewhere more appropriate */
  24        device_t dev;
  25        unsigned long value, base;
  26        dev = pci_locate_device(PCI_ID(0x8086, 0x25a1), 0);
  27        if (dev == PCI_DEV_INVALID) {
  28                die("Missing esb6300?");
  29        }
  30        /* Enable I/O space */
  31        value = pci_read_config16(dev, 0x04);
  32        value |= (1 << 10);
  33        pci_write_config16(dev, 0x04, value);
  34
  35        /* Set and enable acpibase */
  36        pci_write_config32(dev, 0x40, ESB6300_WDBASE | 1);
  37        pci_write_config8(dev, 0x44, 0x10);
  38        base = ESB6300_WDBASE + 0x60;
  39
  40        /* Set bit 11 in TCO1_CNT */
  41        value = inw(base + 0x08);
  42        value |= 1 << 11;
  43        outw(value, base + 0x08);
  44
  45        /* Clear TCO timeout status */
  46        outw(0x0008, base + 0x04);
  47        outw(0x0002, base + 0x06);
  48}
  49
  50static void disable_jarell_frb3(void)
  51{
  52#if 0
  53        device_t dev;
  54        unsigned long value, base;
  55        dev = pci_locate_device(PCI_ID(0x8086, 0x25a1), 0);
  56        if (dev == PCI_DEV_INVALID) {
  57                die("Missing esb6300?");
  58        }
  59        /* Enable I/O space */
  60        value = pci_read_config16(dev, 0x04);
  61        value |= (1 << 0);
  62        pci_write_config16(dev, 0x04, value);
  63
  64        /* Set gpio base */
  65        pci_write_config32(dev, 0x58, ESB6300_GPIOBASE | 1);
  66        base = ESB6300_GPIOBASE;
  67
  68        /* Enable GPIO Bar */
  69        value = pci_read_config32(dev, 0x5c);
  70        value |= 0x10;
  71        pci_write_config32(dev, 0x5c, value);
  72
  73        /* Configure GPIO 48 and 40 as GPIO */
  74        value = inl(base + 0x30);
  75        value |= (1 << 16) | ( 1 << 8);
  76        outl(value, base + 0x30);
  77
  78        /* Configure GPIO 48 as Output */
  79        value = inl(base + 0x34);
  80        value &= ~(1 << 16);
  81        outl(value, base + 0x34);
  82
  83        /* Toggle GPIO 48 high to low */
  84        value = inl(base + 0x38);
  85        value |= (1 << 16);
  86        outl(value, base + 0x38);
  87        value &= ~(1 << 16);
  88        outl(value, base + 0x38);
  89#endif
  90}
  91
  92static void disable_watchdogs(void)
  93{
  94//      disable_sio_watchdog(NSC_WD_DEV);
  95        disable_esb6300_watchdog();
  96//      disable_jarell_frb3();
  97        print_debug("Watchdogs disabled\n");
  98}
  99
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